From a415f5ca4ca75c9dbd0d549c96ca26b374902ae1 Mon Sep 17 00:00:00 2001
From: DL1YCF <dl1ycf@darc.de>
Date: Sat, 6 Aug 2022 12:30:11 +0200
Subject: [PATCH] Increased "CW rf delay" to 30 msec, and use this value in
new_protocol.c
---
new_protocol.c | 8 +-------
old_protocol.c | 11 +++++------
radio.c | 2 +-
3 files changed, 7 insertions(+), 14 deletions(-)
diff --git a/new_protocol.c b/new_protocol.c
index 499e6cd..5b14ec0 100644
--- a/new_protocol.c
+++ b/new_protocol.c
@@ -1282,13 +1282,7 @@ static void new_protocol_transmit_specific() {
transmit_specific_buffer[10]=cw_keyer_weight; // cw weight
transmit_specific_buffer[11]=cw_keyer_hang_time>>8;
transmit_specific_buffer[12]=cw_keyer_hang_time; // cw hang delay
- //
- // Measurements with my Anan-7000 show that RF delays up to 20 msec
- // tend to chop the first dot, and the "rising" envelope at the
- // beginning of the dot is also not good. This was tested with the
- // "straight key" option (external keyer attached to CW input jack).
- //
- transmit_specific_buffer[13]=30; // rf delay
+ transmit_specific_buffer[13]=cw_keyer_ptt_delay;
transmit_specific_buffer[50]=0;
if(mic_linein) {
diff --git a/old_protocol.c b/old_protocol.c
index 97fe4aa..9d67947 100644
--- a/old_protocol.c
+++ b/old_protocol.c
@@ -949,7 +949,7 @@ static void process_control_bytes() {
//underflow/overflow detection.
//
// Measured on HL2 software version 7.2:
- // multiply FIFO value with 32 to get sample cound
+ // multiply FIFO value with 32 to get sample count
// multiply FIFO value with 0.67 to get FIFO length in milli-seconds
// Overflow at about 3600 samples (75 msec).
//
@@ -1996,11 +1996,10 @@ void ozy_send_buffer() {
case 11:
// DL1YCF: HermesLite-II only
// specify some more robust TX latency and PTT hang times
- // A latency of 40 msec means that we first send two buffers
- // of TX iq samples (assuming a buffer length of 1024 samples,
- // that is 21 msec) before HL2 starts TXing. This should be
- // enough to prevent underflows and leave some head-room
- // my measurements indicate that the TX FIFO can hold about
+ // A latency of 40 msec means that we first send 1920
+ // TX iq samples before HL2 starts TXing. This should be
+ // enough to prevent underflows and leave some head-room.
+ // My measurements indicate that the TX FIFO can hold about
// 75 msec or 3600 samples (cum grano salis).
output_buffer[C0]=0x2E;
output_buffer[C3]=20; // 20 msec PTT hang time, only bits 4:0
diff --git a/radio.c b/radio.c
index 90ea0c0..3708262 100644
--- a/radio.c
+++ b/radio.c
@@ -251,7 +251,7 @@ int cw_keyer_weight=50; // 0-100
int cw_keyer_spacing=0; // 0=on 1=off
int cw_keyer_internal=1; // 0=external 1=internal
int cw_keyer_sidetone_volume=50; // 0-127
-int cw_keyer_ptt_delay=20; // 0-255ms
+int cw_keyer_ptt_delay=30; // 0-255ms
int cw_keyer_hang_time=500; // ms
int cw_keyer_sidetone_frequency=800; // Hz
int cw_breakin=1; // 0=disabled 1=enabled
--
2.45.2